Created
February 22, 2026 09:44
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AS7772-32X DTB
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| /dts-v1/; | |
| / { | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| interrupt-parent = <0x01>; | |
| model = "accton,as7772_32x"; | |
| compatible = "accton,as7772_32x"; | |
| cpus { | |
| power-isa-version = "2.06"; | |
| power-isa-b; | |
| power-isa-e; | |
| power-isa-atb; | |
| power-isa-cs; | |
| power-isa-ds; | |
| power-isa-e.ed; | |
| power-isa-e.pd; | |
| power-isa-e.hv; | |
| power-isa-e.le; | |
| power-isa-e.pm; | |
| power-isa-e.pc; | |
| power-isa-ecl; | |
| power-isa-exp; | |
| power-isa-fp; | |
| power-isa-fp.r; | |
| power-isa-mmc; | |
| power-isa-scpm; | |
| power-isa-wt; | |
| fsl,eref-deo; | |
| mmu-type = "power-embedded"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| PowerPC,e6500@0 { | |
| device_type = "cpu"; | |
| reg = <0x00 0x01>; | |
| clocks = <0x02>; | |
| next-level-cache = <0x03>; | |
| linux,phandle = <0x05>; | |
| phandle = <0x05>; | |
| }; | |
| PowerPC,e6500@2 { | |
| device_type = "cpu"; | |
| reg = <0x02 0x03>; | |
| clocks = <0x02>; | |
| next-level-cache = <0x03>; | |
| linux,phandle = <0x06>; | |
| phandle = <0x06>; | |
| }; | |
| PowerPC,e6500@4 { | |
| device_type = "cpu"; | |
| reg = <0x04 0x05>; | |
| clocks = <0x02>; | |
| next-level-cache = <0x03>; | |
| linux,phandle = <0x07>; | |
| phandle = <0x07>; | |
| }; | |
| PowerPC,e6500@6 { | |
| device_type = "cpu"; | |
| reg = <0x06 0x07>; | |
| clocks = <0x02>; | |
| next-level-cache = <0x03>; | |
| linux,phandle = <0x08>; | |
| phandle = <0x08>; | |
| }; | |
| }; | |
| aliases { | |
| ccsr = "/soc@ffe000000"; | |
| dcsr = "/dcsr@f00000000"; | |
| serial0 = "/soc@ffe000000/serial@11c500"; | |
| serial1 = "/soc@ffe000000/serial@11c600"; | |
| serial2 = "/soc@ffe000000/serial@11d500"; | |
| serial3 = "/soc@ffe000000/serial@11d600"; | |
| crypto = "/soc@ffe000000/crypto@300000"; | |
| rman = "/soc@ffe000000/rman@1e0000"; | |
| dce = "/soc@ffe000000/dce@312000"; | |
| pme = "/soc@ffe000000/pme@316000"; | |
| qman = "/soc@ffe000000/qman@318000"; | |
| bman = "/soc@ffe000000/bman@31a000"; | |
| fman0 = "/soc@ffe000000/fman@400000"; | |
| ethernet0 = "/soc@ffe000000/fman@400000/ethernet@e0000"; | |
| pci0 = "/pcie@ffe240000"; | |
| pci1 = "/pcie@ffe250000"; | |
| pci2 = "/pcie@ffe260000"; | |
| pci3 = "/pcie@ffe270000"; | |
| usb0 = "/soc@ffe000000/usb@210000"; | |
| usb1 = "/soc@ffe000000/usb@211000"; | |
| dma0 = "/soc@ffe000000/dma@100300"; | |
| dma1 = "/soc@ffe000000/dma@101300"; | |
| dma2 = "/soc@ffe000000/dma@102300"; | |
| sdhc = "/soc@ffe000000/sdhc@114000"; | |
| }; | |
| localbus@ffe124000 { | |
| reg = <0x0f 0xfe124000 0x00 0x2000>; | |
| ranges = <0x00 0x00 0x0f 0xe8000000 0x8000000 0x02 0x00 0x0f 0xff800000 0x10000 0x03 0x00 0x0f 0xffdf0000 0x8000>; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x01>; | |
| compatible = "fsl,ifc", "simple-bus"; | |
| interrupts = <0x19 0x02 0x00 0x00>; | |
| nor@0,0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "cfi-flash"; | |
| reg = <0x00 0x00 0x8000000>; | |
| bank-width = <0x02>; | |
| device-width = <0x02>; | |
| byteswap; | |
| partition@0 { | |
| reg = <0x00 0x20000>; | |
| label = "RCW"; | |
| }; | |
| partition@1 { | |
| reg = <0x20000 0x20000>; | |
| label = "hw-info"; | |
| }; | |
| partition@2 { | |
| reg = <0x40000 0x2000000>; | |
| label = "onie"; | |
| }; | |
| partition@3 { | |
| reg = <0x2040000 0x2000000>; | |
| label = "diag"; | |
| }; | |
| partition@4 { | |
| reg = <0x4040000 0x3ec0000>; | |
| label = "open"; | |
| }; | |
| partition@5 { | |
| reg = <0x7f00000 0x20000>; | |
| label = "Fman-FW"; | |
| }; | |
| partition@6 { | |
| reg = <0x7f20000 0x20000>; | |
| label = "uboot-env"; | |
| env_size = <0x2000>; | |
| }; | |
| partition@7 { | |
| reg = <0x7f40000 0xc0000>; | |
| label = "uboot"; | |
| }; | |
| }; | |
| board-control@2,0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "fsl,t2080-cpld"; | |
| reg = <0x03 0x00 0x300>; | |
| ranges = <0x00 0x03 0x00 0x300>; | |
| }; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| }; | |
| dcsr@f00000000 { | |
| ranges = <0x00 0x0f 0x00 0x1072000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "fsl,dcsr", "simple-bus"; | |
| dcsr-epu@0 { | |
| compatible = "fsl,t2080-dcsr-epu", "fsl,dcsr-epu"; | |
| interrupts = <0x34 0x02 0x00 0x00 0x54 0x02 0x00 0x00 0x55 0x02 0x00 0x00 0x5e 0x02 0x00 0x00 0x5f 0x02 0x00 0x00>; | |
| reg = <0x00 0x1000>; | |
| }; | |
| dcsr-npc { | |
| compatible = "fsl,t2080-dcsr-cnpc", "fsl,dcsr-cnpc"; | |
| reg = <0x1000 0x1000 0x1002000 0x10000>; | |
| }; | |
| dcsr-nxc@2000 { | |
| compatible = "fsl,dcsr-nxc"; | |
| reg = <0x2000 0x1000>; | |
| }; | |
| dcsr-corenet { | |
| compatible = "fsl,dcsr-corenet"; | |
| reg = <0x8000 0x1000 0x1a000 0x1000>; | |
| }; | |
| dcsr-dpaa@9000 { | |
| compatible = "fsl,t2080-dcsr-dpaa", "fsl,dcsr-dpaa"; | |
| reg = <0x9000 0x1000>; | |
| }; | |
| dcsr-ocn@11000 { | |
| compatible = "fsl,t2080-dcsr-ocn", "fsl,dcsr-ocn"; | |
| reg = <0x11000 0x1000>; | |
| }; | |
| dcsr-ddr@12000 { | |
| compatible = "fsl,dcsr-ddr"; | |
| dev-handle = <0x04>; | |
| reg = <0x12000 0x1000>; | |
| }; | |
| dcsr-nal@18000 { | |
| compatible = "fsl,t2080-dcsr-nal", "fsl,dcsr-nal"; | |
| reg = <0x18000 0x1000>; | |
| }; | |
| dcsr-rcpm@22000 { | |
| compatible = "fsl,t2080-dcsr-rcpm", "fsl,dcsr-rcpm"; | |
| reg = <0x22000 0x1000>; | |
| }; | |
| dcsr-snpc@30000 { | |
| compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc"; | |
| reg = <0x30000 0x1000 0x1022000 0x10000>; | |
| }; | |
| dcsr-snpc@31000 { | |
| compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc"; | |
| reg = <0x31000 0x1000 0x1042000 0x10000>; | |
| }; | |
| dcsr-snpc@32000 { | |
| compatible = "fsl,t2080-dcsr-snpc", "fsl,dcsr-snpc"; | |
| reg = <0x32000 0x1000 0x1062000 0x10000>; | |
| }; | |
| dcsr-cpu-sb-proxy@100000 { | |
| compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; | |
| cpu-handle = <0x05>; | |
| reg = <0x100000 0x1000 0x101000 0x1000>; | |
| }; | |
| dcsr-cpu-sb-proxy@108000 { | |
| compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; | |
| cpu-handle = <0x06>; | |
| reg = <0x108000 0x1000 0x109000 0x1000>; | |
| }; | |
| dcsr-cpu-sb-proxy@110000 { | |
| compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; | |
| cpu-handle = <0x07>; | |
| reg = <0x110000 0x1000 0x111000 0x1000>; | |
| }; | |
| dcsr-cpu-sb-proxy@118000 { | |
| compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy"; | |
| cpu-handle = <0x08>; | |
| reg = <0x118000 0x1000 0x119000 0x1000>; | |
| }; | |
| }; | |
| bman-portals@ff4000000 { | |
| ranges = <0x00 0x0f 0xf4000000 0x2000000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "simple-bus"; | |
| bman-portal@0 { | |
| cell-index = <0x00>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x00 0x4000 0x1000000 0x1000>; | |
| interrupts = <0x69 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@4000 { | |
| cell-index = <0x01>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x4000 0x4000 0x1001000 0x1000>; | |
| interrupts = <0x6b 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@8000 { | |
| cell-index = <0x02>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x8000 0x4000 0x1002000 0x1000>; | |
| interrupts = <0x6d 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@c000 { | |
| cell-index = <0x03>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0xc000 0x4000 0x1003000 0x1000>; | |
| interrupts = <0x6f 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@10000 { | |
| cell-index = <0x04>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x10000 0x4000 0x1004000 0x1000>; | |
| interrupts = <0x71 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@14000 { | |
| cell-index = <0x05>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x14000 0x4000 0x1005000 0x1000>; | |
| interrupts = <0x73 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@18000 { | |
| cell-index = <0x06>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x18000 0x4000 0x1006000 0x1000>; | |
| interrupts = <0x75 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@1c000 { | |
| cell-index = <0x07>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x1c000 0x4000 0x1007000 0x1000>; | |
| interrupts = <0x77 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@20000 { | |
| cell-index = <0x08>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x20000 0x4000 0x1008000 0x1000>; | |
| interrupts = <0x79 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@24000 { | |
| cell-index = <0x09>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x24000 0x4000 0x1009000 0x1000>; | |
| interrupts = <0x7b 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@28000 { | |
| cell-index = <0x0a>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x28000 0x4000 0x100a000 0x1000>; | |
| interrupts = <0x7d 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@2c000 { | |
| cell-index = <0x0b>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x2c000 0x4000 0x100b000 0x1000>; | |
| interrupts = <0x7f 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@30000 { | |
| cell-index = <0x0c>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x30000 0x4000 0x100c000 0x1000>; | |
| interrupts = <0x81 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@34000 { | |
| cell-index = <0x0d>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x34000 0x4000 0x100d000 0x1000>; | |
| interrupts = <0x83 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@38000 { | |
| cell-index = <0x0e>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x38000 0x4000 0x100e000 0x1000>; | |
| interrupts = <0x85 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@3c000 { | |
| cell-index = <0x0f>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x3c000 0x4000 0x100f000 0x1000>; | |
| interrupts = <0x87 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@40000 { | |
| cell-index = <0x10>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x40000 0x4000 0x1010000 0x1000>; | |
| interrupts = <0x89 0x02 0x00 0x00>; | |
| }; | |
| bman-portal@44000 { | |
| cell-index = <0x11>; | |
| compatible = "fsl,bman-portal"; | |
| reg = <0x44000 0x4000 0x1011000 0x1000>; | |
| interrupts = <0x8b 0x02 0x00 0x00>; | |
| }; | |
| bman-bpids@0 { | |
| compatible = "fsl,bpid-range"; | |
| fsl,bpid-range = <0x20 0x20>; | |
| }; | |
| }; | |
| qman-portals@ff6000000 { | |
| ranges = <0x00 0x0f 0xf6000000 0x2000000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "simple-bus"; | |
| qman-portal@0 { | |
| cell-index = <0x00>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x00 0x4000 0x1000000 0x1000>; | |
| interrupts = <0x68 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x00>; | |
| }; | |
| qman-portal@4000 { | |
| cell-index = <0x01>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x4000 0x4000 0x1001000 0x1000>; | |
| interrupts = <0x6a 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x01>; | |
| }; | |
| qman-portal@8000 { | |
| cell-index = <0x02>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x8000 0x4000 0x1002000 0x1000>; | |
| interrupts = <0x6c 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x02>; | |
| }; | |
| qman-portal@c000 { | |
| cell-index = <0x03>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0xc000 0x4000 0x1003000 0x1000>; | |
| interrupts = <0x6e 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x03>; | |
| }; | |
| qman-portal@10000 { | |
| cell-index = <0x04>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x10000 0x4000 0x1004000 0x1000>; | |
| interrupts = <0x70 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x04>; | |
| }; | |
| qman-portal@14000 { | |
| cell-index = <0x05>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x14000 0x4000 0x1005000 0x1000>; | |
| interrupts = <0x72 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x05>; | |
| }; | |
| qman-portal@18000 { | |
| cell-index = <0x06>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x18000 0x4000 0x1006000 0x1000>; | |
| interrupts = <0x74 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x06>; | |
| }; | |
| qman-portal@1c000 { | |
| cell-index = <0x07>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x1c000 0x4000 0x1007000 0x1000>; | |
| interrupts = <0x76 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x07>; | |
| }; | |
| qman-portal@20000 { | |
| cell-index = <0x08>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x20000 0x4000 0x1008000 0x1000>; | |
| interrupts = <0x78 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x08>; | |
| }; | |
| qman-portal@24000 { | |
| cell-index = <0x09>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x24000 0x4000 0x1009000 0x1000>; | |
| interrupts = <0x7a 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x09>; | |
| }; | |
| qman-portal@28000 { | |
| cell-index = <0x0a>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x28000 0x4000 0x100a000 0x1000>; | |
| interrupts = <0x7c 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x0a>; | |
| }; | |
| qman-portal@2c000 { | |
| cell-index = <0x0b>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x2c000 0x4000 0x100b000 0x1000>; | |
| interrupts = <0x7e 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x0b>; | |
| }; | |
| qman-portal@30000 { | |
| cell-index = <0x0c>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x30000 0x4000 0x100c000 0x1000>; | |
| interrupts = <0x80 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x0c>; | |
| }; | |
| qman-portal@34000 { | |
| cell-index = <0x0d>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x34000 0x4000 0x100d000 0x1000>; | |
| interrupts = <0x82 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x0d>; | |
| }; | |
| qman-portal@38000 { | |
| cell-index = <0x0e>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x38000 0x4000 0x100e000 0x1000>; | |
| interrupts = <0x84 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x0e>; | |
| }; | |
| qman-portal@3c000 { | |
| cell-index = <0x0f>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x3c000 0x4000 0x100f000 0x1000>; | |
| interrupts = <0x86 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x0f>; | |
| }; | |
| qman-portal@40000 { | |
| cell-index = <0x10>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x40000 0x4000 0x1010000 0x1000>; | |
| interrupts = <0x88 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x10>; | |
| }; | |
| qman-portal@44000 { | |
| cell-index = <0x11>; | |
| compatible = "fsl,qman-portal"; | |
| reg = <0x44000 0x4000 0x1011000 0x1000>; | |
| interrupts = <0x8a 0x02 0x00 0x00>; | |
| fsl,qman-channel-id = <0x11>; | |
| }; | |
| qman-fqids@0 { | |
| compatible = "fsl,fqid-range"; | |
| fsl,fqid-range = <0x100 0x200>; | |
| }; | |
| qman-fqids@1 { | |
| compatible = "fsl,fqid-range"; | |
| fsl,fqid-range = <0x8000 0x8000>; | |
| }; | |
| qman-pools@0 { | |
| compatible = "fsl,pool-channel-range"; | |
| fsl,pool-channel-range = <0x401 0x0f>; | |
| }; | |
| qman-cgrids@0 { | |
| compatible = "fsl,cgrid-range"; | |
| fsl,cgrid-range = <0x00 0x100>; | |
| }; | |
| qman-ceetm@0 { | |
| compatible = "fsl,qman-ceetm"; | |
| fsl,ceetm-lfqid-range = <0xf00000 0x1000>; | |
| fsl,ceetm-sp-range = <0x00 0x0c>; | |
| fsl,ceetm-lni-range = <0x00 0x08>; | |
| fsl,ceetm-channel-range = <0x00 0x20>; | |
| }; | |
| }; | |
| soc@ffe000000 { | |
| ranges = <0x00 0x0f 0xfe000000 0x1000000>; | |
| reg = <0x0f 0xfe000000 0x00 0x1000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| device_type = "soc"; | |
| compatible = "simple-bus"; | |
| i2c@118000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cell-index = <0x00>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x118000 0x100>; | |
| interrupts = <0x26 0x02 0x00 0x00>; | |
| dfsrr; | |
| adt7461@4c { | |
| compatible = "adi,adt7461"; | |
| reg = <0x4c>; | |
| }; | |
| eeprom@50 { | |
| compatible = "at24,24c256"; | |
| reg = <0x50>; | |
| }; | |
| ds1672@68 { | |
| compatible = "dallas,ds1672"; | |
| reg = <0x68>; | |
| }; | |
| }; | |
| i2c@118100 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cell-index = <0x01>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x118100 0x100>; | |
| interrupts = <0x26 0x02 0x00 0x00>; | |
| dfsrr; | |
| pca9546@77 { | |
| compatible = "nxp,pca9546"; | |
| reg = <0x77>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| i2c@0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x00>; | |
| sfp@50 { | |
| compatible = "optics,sfp"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| sdhc@114000 { | |
| voltage-ranges = <0x708 0x708 0xce4 0xce4>; | |
| compatible = "fsl,t2080-esdhc", "fsl,esdhc"; | |
| reg = <0x114000 0x1000>; | |
| interrupts = <0x30 0x02 0x00 0x00>; | |
| clock-frequency = <0x00>; | |
| sdhci,auto-cmd12; | |
| }; | |
| fman@400000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| cell-index = <0x00>; | |
| compatible = "fsl,fman", "simple-bus"; | |
| ranges = <0x00 0x400000 0x100000>; | |
| reg = <0x400000 0x100000>; | |
| clock-frequency = <0x00>; | |
| interrupts = <0x60 0x02 0x00 0x00 0x10 0x02 0x01 0x01>; | |
| ethernet@e0000 { | |
| phy-handle = <0x10>; | |
| phy-connection-type = "sgmii"; | |
| cell-index = <0x00>; | |
| compatible = "fsl,fman-memac"; | |
| reg = <0xe0000 0x1000>; | |
| fsl,port-handles = <0x0a 0x0b>; | |
| ptimer-handle = <0x0c>; | |
| linux,phandle = <0x24>; | |
| phandle = <0x24>; | |
| }; | |
| mdio@fc000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xfc000 0x1000>; | |
| ethernet-phy@1f { | |
| reg = <0x1f>; | |
| linux,phandle = <0x10>; | |
| phandle = <0x10>; | |
| }; | |
| }; | |
| cc { | |
| compatible = "fsl,fman-cc"; | |
| }; | |
| muram@0 { | |
| compatible = "fsl,fman-muram"; | |
| reg = <0x00 0x60000>; | |
| }; | |
| bmi@80000 { | |
| compatible = "fsl,fman-bmi"; | |
| reg = <0x80000 0x400>; | |
| }; | |
| qmi@80400 { | |
| compatible = "fsl,fman-qmi"; | |
| reg = <0x80400 0x400>; | |
| }; | |
| port@82000 { | |
| cell-index = <0x00>; | |
| compatible = "fsl,fman-port-oh"; | |
| reg = <0x82000 0x1000>; | |
| fsl,qman-channel-id = <0x809>; | |
| }; | |
| port@83000 { | |
| cell-index = <0x01>; | |
| compatible = "fsl,fman-port-oh"; | |
| reg = <0x83000 0x1000>; | |
| fsl,qman-channel-id = <0x80a>; | |
| }; | |
| port@84000 { | |
| cell-index = <0x02>; | |
| compatible = "fsl,fman-port-oh"; | |
| reg = <0x84000 0x1000>; | |
| fsl,qman-channel-id = <0x80b>; | |
| }; | |
| port@85000 { | |
| cell-index = <0x03>; | |
| compatible = "fsl,fman-port-oh"; | |
| reg = <0x85000 0x1000>; | |
| fsl,qman-channel-id = <0x80c>; | |
| }; | |
| port@86000 { | |
| cell-index = <0x04>; | |
| compatible = "fsl,fman-port-oh"; | |
| reg = <0x86000 0x1000>; | |
| fsl,qman-channel-id = <0x80d>; | |
| }; | |
| port@87000 { | |
| cell-index = <0x05>; | |
| compatible = "fsl,fman-port-oh"; | |
| reg = <0x87000 0x1000>; | |
| fsl,qman-channel-id = <0x80e>; | |
| }; | |
| policer@c0000 { | |
| compatible = "fsl,fman-policer"; | |
| reg = <0xc0000 0x1000>; | |
| }; | |
| keygen@c1000 { | |
| compatible = "fsl,fman-keygen"; | |
| reg = <0xc1000 0x1000>; | |
| }; | |
| dma@c2000 { | |
| compatible = "fsl,fman-dma"; | |
| reg = <0xc2000 0x1000>; | |
| }; | |
| fpm@c3000 { | |
| compatible = "fsl,fman-fpm"; | |
| reg = <0xc3000 0x1000>; | |
| }; | |
| parser@c7000 { | |
| compatible = "fsl,fman-parser"; | |
| reg = <0xc7000 0x1000>; | |
| }; | |
| vsps@dc000 { | |
| compatible = "fsl,fman-vsps"; | |
| reg = <0xdc000 0x1000>; | |
| }; | |
| rtc@fe000 { | |
| compatible = "fsl,fman-rtc"; | |
| reg = <0xfe000 0x1000>; | |
| linux,phandle = <0x0c>; | |
| phandle = <0x0c>; | |
| }; | |
| port@88000 { | |
| cell-index = <0x00>; | |
| compatible = "fsl,fman-port-1g-rx"; | |
| reg = <0x88000 0x1000>; | |
| linux,phandle = <0x0a>; | |
| phandle = <0x0a>; | |
| }; | |
| port@a8000 { | |
| cell-index = <0x00>; | |
| compatible = "fsl,fman-port-1g-tx"; | |
| reg = <0xa8000 0x1000>; | |
| fsl,qman-channel-id = <0x802>; | |
| linux,phandle = <0x0b>; | |
| phandle = <0x0b>; | |
| }; | |
| mdio@e1000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xe1000 0x1000>; | |
| }; | |
| port@89000 { | |
| cell-index = <0x01>; | |
| compatible = "fsl,fman-port-1g-rx"; | |
| reg = <0x89000 0x1000>; | |
| linux,phandle = <0x0e>; | |
| phandle = <0x0e>; | |
| }; | |
| port@a9000 { | |
| cell-index = <0x01>; | |
| compatible = "fsl,fman-port-1g-tx"; | |
| reg = <0xa9000 0x1000>; | |
| fsl,qman-channel-id = <0x803>; | |
| linux,phandle = <0x0f>; | |
| phandle = <0x0f>; | |
| }; | |
| mdio@e3000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xe3000 0x1000>; | |
| }; | |
| port@8a000 { | |
| cell-index = <0x02>; | |
| compatible = "fsl,fman-port-1g-rx"; | |
| reg = <0x8a000 0x1000>; | |
| linux,phandle = <0x11>; | |
| phandle = <0x11>; | |
| }; | |
| port@aa000 { | |
| cell-index = <0x02>; | |
| compatible = "fsl,fman-port-1g-tx"; | |
| reg = <0xaa000 0x1000>; | |
| fsl,qman-channel-id = <0x804>; | |
| linux,phandle = <0x12>; | |
| phandle = <0x12>; | |
| }; | |
| mdio@e5000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xe5000 0x1000>; | |
| }; | |
| port@8b000 { | |
| cell-index = <0x03>; | |
| compatible = "fsl,fman-port-1g-rx"; | |
| reg = <0x8b000 0x1000>; | |
| linux,phandle = <0x14>; | |
| phandle = <0x14>; | |
| }; | |
| port@ab000 { | |
| cell-index = <0x03>; | |
| compatible = "fsl,fman-port-1g-tx"; | |
| reg = <0xab000 0x1000>; | |
| fsl,qman-channel-id = <0x805>; | |
| linux,phandle = <0x15>; | |
| phandle = <0x15>; | |
| }; | |
| mdio@e7000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xe7000 0x1000>; | |
| }; | |
| port@8c000 { | |
| cell-index = <0x04>; | |
| compatible = "fsl,fman-port-1g-rx"; | |
| reg = <0x8c000 0x1000>; | |
| linux,phandle = <0x16>; | |
| phandle = <0x16>; | |
| }; | |
| port@ac000 { | |
| cell-index = <0x04>; | |
| compatible = "fsl,fman-port-1g-tx"; | |
| reg = <0xac000 0x1000>; | |
| fsl,qman-channel-id = <0x806>; | |
| linux,phandle = <0x17>; | |
| phandle = <0x17>; | |
| }; | |
| mdio@e9000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xe9000 0x1000>; | |
| }; | |
| port@8d000 { | |
| cell-index = <0x05>; | |
| compatible = "fsl,fman-port-1g-rx"; | |
| reg = <0x8d000 0x1000>; | |
| linux,phandle = <0x18>; | |
| phandle = <0x18>; | |
| }; | |
| port@ad000 { | |
| cell-index = <0x05>; | |
| compatible = "fsl,fman-port-1g-tx"; | |
| reg = <0xad000 0x1000>; | |
| fsl,qman-channel-id = <0x807>; | |
| linux,phandle = <0x19>; | |
| phandle = <0x19>; | |
| }; | |
| mdio@eb000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xeb000 0x1000>; | |
| }; | |
| port@90000 { | |
| cell-index = <0x00>; | |
| compatible = "fsl,fman-port-10g-rx"; | |
| reg = <0x90000 0x1000>; | |
| linux,phandle = <0x1b>; | |
| phandle = <0x1b>; | |
| }; | |
| port@b0000 { | |
| cell-index = <0x00>; | |
| compatible = "fsl,fman-port-10g-tx"; | |
| reg = <0xb0000 0x1000>; | |
| fsl,qman-channel-id = <0x800>; | |
| linux,phandle = <0x1c>; | |
| phandle = <0x1c>; | |
| }; | |
| mdio@f1000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xf1000 0x1000>; | |
| }; | |
| port@91000 { | |
| cell-index = <0x01>; | |
| compatible = "fsl,fman-port-10g-rx"; | |
| reg = <0x91000 0x1000>; | |
| linux,phandle = <0x1e>; | |
| phandle = <0x1e>; | |
| }; | |
| port@b1000 { | |
| cell-index = <0x01>; | |
| compatible = "fsl,fman-port-10g-tx"; | |
| reg = <0xb1000 0x1000>; | |
| fsl,qman-channel-id = <0x801>; | |
| linux,phandle = <0x1f>; | |
| phandle = <0x1f>; | |
| }; | |
| mdio@f3000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| compatible = "fsl,fman-memac-mdio"; | |
| reg = <0xf3000 0x1000>; | |
| }; | |
| }; | |
| soc-sram-error { | |
| compatible = "fsl,soc-sram-error"; | |
| interrupts = <0x10 0x02 0x01 0x1d>; | |
| }; | |
| corenet-law@0 { | |
| compatible = "fsl,corenet-law"; | |
| reg = <0x00 0x1000>; | |
| fsl,num-laws = <0x20>; | |
| }; | |
| memory-controller@8000 { | |
| compatible = "fsl,qoriq-memory-controller-v4.7", "fsl,qoriq-memory-controller"; | |
| reg = <0x8000 0x1000>; | |
| interrupts = <0x10 0x02 0x01 0x17>; | |
| linux,phandle = <0x04>; | |
| phandle = <0x04>; | |
| }; | |
| l3-cache-controller@10000 { | |
| compatible = "fsl,t2080-l3-cache-controller", "cache"; | |
| reg = <0x10000 0x1000 0x11000 0x1000 0x12000 0x1000>; | |
| interrupts = <0x10 0x02 0x01 0x1b 0x10 0x02 0x01 0x1a 0x10 0x02 0x01 0x19>; | |
| linux,phandle = <0x23>; | |
| phandle = <0x23>; | |
| }; | |
| corenet-cf@18000 { | |
| compatible = "fsl,corenet2-cf"; | |
| reg = <0x18000 0x1000>; | |
| interrupts = <0x10 0x02 0x01 0x1f>; | |
| fsl,ccf-num-csdids = <0x20>; | |
| fsl,ccf-num-snoopids = <0x20>; | |
| }; | |
| iommu@20000 { | |
| compatible = "fsl,pamu-v1.0", "fsl,pamu"; | |
| reg = <0x20000 0x6000>; | |
| interrupts = <0x18 0x02 0x00 0x00 0x10 0x02 0x01 0x1e>; | |
| }; | |
| pic@40000 { | |
| interrupt-controller; | |
| #address-cells = <0x00>; | |
| #interrupt-cells = <0x04>; | |
| reg = <0x40000 0x40000>; | |
| compatible = "fsl,mpic", "chrp,open-pic"; | |
| device_type = "open-pic"; | |
| clock-frequency = <0x00>; | |
| linux,phandle = <0x01>; | |
| phandle = <0x01>; | |
| }; | |
| timer@41100 { | |
| compatible = "fsl,mpic-global-timer"; | |
| reg = <0x41100 0x100 0x41300 0x04>; | |
| interrupts = <0x00 0x00 0x03 0x00 0x01 0x00 0x03 0x00 0x02 0x00 0x03 0x00 0x03 0x00 0x03 0x00>; | |
| }; | |
| msi@41600 { | |
| compatible = "fsl,mpic-msi"; | |
| reg = <0x41600 0x200 0x44140 0x04>; | |
| msi-available-ranges = <0x00 0x100>; | |
| interrupts = <0xe0 0x00 0x00 0x00 0xe1 0x00 0x00 0x00 0xe2 0x00 0x00 0x00 0xe3 0x00 0x00 0x00 0xe4 0x00 0x00 0x00 0xe5 0x00 0x00 0x00 0xe6 0x00 0x00 0x00 0xe7 0x00 0x00 0x00>; | |
| }; | |
| msi@41800 { | |
| compatible = "fsl,mpic-msi"; | |
| reg = <0x41800 0x200 0x45140 0x04>; | |
| msi-available-ranges = <0x00 0x100>; | |
| interrupts = <0xe8 0x00 0x00 0x00 0xe9 0x00 0x00 0x00 0xea 0x00 0x00 0x00 0xeb 0x00 0x00 0x00 0xec 0x00 0x00 0x00 0xed 0x00 0x00 0x00 0xee 0x00 0x00 0x00 0xef 0x00 0x00 0x00>; | |
| }; | |
| msi@41a00 { | |
| compatible = "fsl,mpic-msi"; | |
| reg = <0x41a00 0x200 0x46140 0x04>; | |
| msi-available-ranges = <0x00 0x100>; | |
| interrupts = <0xf0 0x00 0x00 0x00 0xf1 0x00 0x00 0x00 0xf2 0x00 0x00 0x00 0xf3 0x00 0x00 0x00 0xf4 0x00 0x00 0x00 0xf5 0x00 0x00 0x00 0xf6 0x00 0x00 0x00 0xf7 0x00 0x00 0x00>; | |
| }; | |
| timer@42100 { | |
| compatible = "fsl,mpic-global-timer"; | |
| reg = <0x42100 0x100 0x42300 0x04>; | |
| interrupts = <0x04 0x00 0x03 0x00 0x05 0x00 0x03 0x00 0x06 0x00 0x03 0x00 0x07 0x00 0x03 0x00>; | |
| }; | |
| global-utilities@e0000 { | |
| compatible = "fsl,t2080-device-config", "fsl,qoriq-device-config-2.0"; | |
| reg = <0xe0000 0xe00>; | |
| fsl,has-rstcr; | |
| fsl,liodn-bits = <0x0c>; | |
| }; | |
| global-utilities@e1000 { | |
| compatible = "fsl,t2080-clockgen", "fsl,qoriq-clockgen-2.0", "fixed-clock"; | |
| reg = <0xe1000 0x1000>; | |
| clock-output-names = "sysclk"; | |
| #clock-cells = <0x00>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| linux,phandle = <0x20>; | |
| phandle = <0x20>; | |
| pll0@800 { | |
| #clock-cells = <0x01>; | |
| reg = <0x800>; | |
| compatible = "fsl,core-pll-clock"; | |
| clocks = <0x20>; | |
| clock-output-names = "pll0", "pll0-div2", "pll0-div4"; | |
| linux,phandle = <0x21>; | |
| phandle = <0x21>; | |
| }; | |
| pll1@820 { | |
| #clock-cells = <0x01>; | |
| reg = <0x820>; | |
| compatible = "fsl,core-pll-clock"; | |
| clocks = <0x20>; | |
| clock-output-names = "pll1", "pll1-div2", "pll1-div4"; | |
| linux,phandle = <0x22>; | |
| phandle = <0x22>; | |
| }; | |
| mux0@0 { | |
| #clock-cells = <0x00>; | |
| reg = <0x00>; | |
| compatible = "fsl,core-mux-clock"; | |
| clocks = <0x21 0x00 0x21 0x01 0x21 0x02 0x22 0x00 0x22 0x01 0x22 0x02>; | |
| clock-names = "pll0_0", "pll0_1", "pll0_2", "pll1_0", "pll1_1", "pll1_2"; | |
| clock-output-names = "cmux0"; | |
| linux,phandle = <0x02>; | |
| phandle = <0x02>; | |
| }; | |
| mux1@20 { | |
| #clock-cells = <0x00>; | |
| reg = <0x20>; | |
| compatible = "fsl,core-mux-clock"; | |
| clocks = <0x21 0x00 0x21 0x01 0x21 0x02 0x22 0x00 0x22 0x01 0x22 0x02>; | |
| clock-names = "pll0_0", "pll0_1", "pll0_2", "pll1_0", "pll1_1", "pll1_2"; | |
| clock-output-names = "cmux1"; | |
| }; | |
| }; | |
| global-utilities@e2000 { | |
| compatible = "fsl,t2080-rcpm", "fsl,qoriq-rcpm-2.0"; | |
| reg = <0xe2000 0x1000>; | |
| }; | |
| dma@100300 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "fsl,elo3-dma"; | |
| reg = <0x100300 0x04 0x100600 0x04>; | |
| ranges = <0x00 0x100100 0x500>; | |
| dma-channel@0 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x00 0x80>; | |
| interrupts = <0x1c 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@80 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x80 0x80>; | |
| interrupts = <0x1d 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@100 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x100 0x80>; | |
| interrupts = <0x1e 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@180 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x180 0x80>; | |
| interrupts = <0x1f 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@300 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x300 0x80>; | |
| interrupts = <0x4c 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@380 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x380 0x80>; | |
| interrupts = <0x4d 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@400 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x400 0x80>; | |
| interrupts = <0x4e 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@480 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x480 0x80>; | |
| interrupts = <0x4f 0x02 0x00 0x00>; | |
| }; | |
| }; | |
| dma@101300 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "fsl,elo3-dma"; | |
| reg = <0x101300 0x04 0x101600 0x04>; | |
| ranges = <0x00 0x101100 0x500>; | |
| dma-channel@0 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x00 0x80>; | |
| interrupts = <0x20 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@80 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x80 0x80>; | |
| interrupts = <0x21 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@100 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x100 0x80>; | |
| interrupts = <0x22 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@180 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x180 0x80>; | |
| interrupts = <0x23 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@300 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x300 0x80>; | |
| interrupts = <0x50 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@380 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x380 0x80>; | |
| interrupts = <0x51 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@400 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x400 0x80>; | |
| interrupts = <0x52 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@480 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x480 0x80>; | |
| interrupts = <0x53 0x02 0x00 0x00>; | |
| }; | |
| }; | |
| dma@102300 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| compatible = "fsl,elo3-dma"; | |
| reg = <0x102300 0x04 0x102600 0x04>; | |
| ranges = <0x00 0x102100 0x500>; | |
| dma-channel@0 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x00 0x80>; | |
| interrupts = <0x1d0 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@80 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x80 0x80>; | |
| interrupts = <0x1d1 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@100 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x100 0x80>; | |
| interrupts = <0x1d2 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@180 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x180 0x80>; | |
| interrupts = <0x1d3 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@300 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x300 0x80>; | |
| interrupts = <0x1d4 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@380 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x380 0x80>; | |
| interrupts = <0x1d5 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@400 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x400 0x80>; | |
| interrupts = <0x1d6 0x02 0x00 0x00>; | |
| }; | |
| dma-channel@480 { | |
| compatible = "fsl,eloplus-dma-channel"; | |
| reg = <0x480 0x80>; | |
| interrupts = <0x1d7 0x02 0x00 0x00>; | |
| }; | |
| }; | |
| i2c@119000 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cell-index = <0x02>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x119000 0x100>; | |
| interrupts = <0x27 0x02 0x00 0x00>; | |
| dfsrr; | |
| }; | |
| i2c@119100 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| cell-index = <0x03>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x119100 0x100>; | |
| interrupts = <0x27 0x02 0x00 0x00>; | |
| dfsrr; | |
| pca9548@71 { | |
| compatible = "nxp,pca9548"; | |
| reg = <0x71>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| }; | |
| pca9548@72 { | |
| compatible = "nxp,pca9548"; | |
| reg = <0x72>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| i2c@0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x00>; | |
| sfp9@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@1 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x01>; | |
| sfp10@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@2 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x02>; | |
| sfp11@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@3 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x03>; | |
| sfp12@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@4 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x04>; | |
| sfp1@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@5 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x05>; | |
| sfp2@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@6 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x06>; | |
| sfp3@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@7 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x07>; | |
| sfp4@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| }; | |
| pca9548@73 { | |
| compatible = "nxp,pca9548"; | |
| reg = <0x73>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| i2c@0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x00>; | |
| sfp6@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@1 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x01>; | |
| sfp5@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@2 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x02>; | |
| sfp8@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@3 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x03>; | |
| sfp7@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@4 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x04>; | |
| sfp13@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@5 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x05>; | |
| sfp14@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@6 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x06>; | |
| sfp15@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@7 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x07>; | |
| sfp16@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| }; | |
| pca9548@74 { | |
| compatible = "nxp,pca9548"; | |
| reg = <0x74>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| i2c@0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x00>; | |
| sfp17@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@1 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x01>; | |
| sfp18@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@2 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x02>; | |
| sfp19@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@3 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x03>; | |
| sfp20@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@4 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x04>; | |
| sfp25@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@5 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x05>; | |
| sfp26@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@6 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x06>; | |
| sfp27@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@7 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x07>; | |
| sfp28@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| }; | |
| pca9548@75 { | |
| compatible = "nxp,pca9548"; | |
| reg = <0x75>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| i2c@0 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x00>; | |
| sfp29@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@1 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x01>; | |
| sfp30@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@2 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x02>; | |
| sfp31@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@3 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x03>; | |
| sfp32@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@4 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x04>; | |
| sfp21@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@5 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x05>; | |
| sfp22@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@6 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x06>; | |
| sfp23@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| i2c@7 { | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| reg = <0x07>; | |
| sfp24@50 { | |
| compatible = "at24,24c02"; | |
| reg = <0x50>; | |
| }; | |
| }; | |
| }; | |
| }; | |
| serial@11c500 { | |
| cell-index = <0x00>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x11c500 0x100>; | |
| clock-frequency = <0x00>; | |
| interrupts = <0x24 0x02 0x00 0x00>; | |
| }; | |
| serial@11c600 { | |
| cell-index = <0x01>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x11c600 0x100>; | |
| clock-frequency = <0x00>; | |
| interrupts = <0x24 0x02 0x00 0x00>; | |
| }; | |
| serial@11d500 { | |
| cell-index = <0x02>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x11d500 0x100>; | |
| clock-frequency = <0x00>; | |
| interrupts = <0x25 0x02 0x00 0x00>; | |
| }; | |
| serial@11d600 { | |
| cell-index = <0x03>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x11d600 0x100>; | |
| clock-frequency = <0x00>; | |
| interrupts = <0x25 0x02 0x00 0x00>; | |
| }; | |
| gpio@130000 { | |
| compatible = "fsl,qoriq-gpio"; | |
| reg = <0x130000 0x1000>; | |
| interrupts = <0x37 0x02 0x00 0x00>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpio@131000 { | |
| compatible = "fsl,qoriq-gpio"; | |
| reg = <0x131000 0x1000>; | |
| interrupts = <0x36 0x02 0x00 0x00>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpio@132000 { | |
| compatible = "fsl,qoriq-gpio"; | |
| reg = <0x132000 0x1000>; | |
| interrupts = <0x56 0x02 0x00 0x00>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| gpio@133000 { | |
| compatible = "fsl,qoriq-gpio"; | |
| reg = <0x133000 0x1000>; | |
| interrupts = <0x57 0x02 0x00 0x00>; | |
| #gpio-cells = <0x02>; | |
| gpio-controller; | |
| }; | |
| rman@1e0000 { | |
| compatible = "fsl,rman"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| ranges = <0x00 0x1e0000 0x20000>; | |
| reg = <0x1e0000 0x20000>; | |
| interrupts = <0x10 0x02 0x01 0x0b>; | |
| fsl,qman-channels-id = <0x820 0x821>; | |
| inbound-block@0 { | |
| compatible = "fsl,rman-inbound-block"; | |
| reg = <0x00 0x800>; | |
| }; | |
| global-cfg@b00 { | |
| compatible = "fsl,rman-global-cfg"; | |
| reg = <0xb00 0x500>; | |
| }; | |
| inbound-block@1000 { | |
| compatible = "fsl,rman-inbound-block"; | |
| reg = <0x1000 0x800>; | |
| }; | |
| inbound-block@2000 { | |
| compatible = "fsl,rman-inbound-block"; | |
| reg = <0x2000 0x800>; | |
| }; | |
| inbound-block@3000 { | |
| compatible = "fsl,rman-inbound-block"; | |
| reg = <0x3000 0x800>; | |
| }; | |
| }; | |
| usb@210000 { | |
| compatible = "fsl-usb2-mph-v2.5", "fsl-usb2-mph"; | |
| reg = <0x210000 0x1000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x2c 0x02 0x00 0x00>; | |
| phy_type = "utmi"; | |
| port0; | |
| }; | |
| usb@211000 { | |
| compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; | |
| reg = <0x211000 0x1000>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x00>; | |
| interrupts = <0x2d 0x02 0x00 0x00>; | |
| dr_mode = "host"; | |
| phy_type = "utmi"; | |
| }; | |
| crypto@300000 { | |
| compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0"; | |
| fsl,sec-era = <0x05>; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| reg = <0x300000 0x10000>; | |
| ranges = <0x00 0x300000 0x10000>; | |
| interrupts = <0x5c 0x02 0x00 0x00>; | |
| jr@1000 { | |
| compatible = "fsl,sec-v5.2-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; | |
| reg = <0x1000 0x1000>; | |
| interrupts = <0x58 0x02 0x00 0x00>; | |
| }; | |
| jr@2000 { | |
| compatible = "fsl,sec-v5.2-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; | |
| reg = <0x2000 0x1000>; | |
| interrupts = <0x59 0x02 0x00 0x00>; | |
| }; | |
| jr@3000 { | |
| compatible = "fsl,sec-v5.2-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; | |
| reg = <0x3000 0x1000>; | |
| interrupts = <0x5a 0x02 0x00 0x00>; | |
| }; | |
| jr@4000 { | |
| compatible = "fsl,sec-v5.2-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; | |
| reg = <0x4000 0x1000>; | |
| interrupts = <0x5b 0x02 0x00 0x00>; | |
| }; | |
| rtic@6000 { | |
| compatible = "fsl,sec-v5.2-rtic", "fsl,sec-v5.0-rtic", "fsl,sec-v4.0-rtic"; | |
| #address-cells = <0x01>; | |
| #size-cells = <0x01>; | |
| reg = <0x6000 0x100>; | |
| ranges = <0x00 0x6100 0xe00>; | |
| rtic-a@0 { | |
| compatible = "fsl,sec-v5.2-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory"; | |
| reg = <0x00 0x20 0x100 0x80>; | |
| }; | |
| rtic-b@20 { | |
| compatible = "fsl,sec-v5.2-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory"; | |
| reg = <0x20 0x20 0x200 0x80>; | |
| }; | |
| rtic-c@40 { | |
| compatible = "fsl,sec-v5.2-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory"; | |
| reg = <0x40 0x20 0x300 0x80>; | |
| }; | |
| rtic-d@60 { | |
| compatible = "fsl,sec-v5.2-rtic-memory", "fsl,sec-v5.0-rtic-memory", "fsl,sec-v4.0-rtic-memory"; | |
| reg = <0x60 0x20 0x500 0x80>; | |
| }; | |
| }; | |
| }; | |
| sec_mon@314000 { | |
| compatible = "fsl,sec-v5.2-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon"; | |
| reg = <0x314000 0x1000>; | |
| interrupts = <0x5d 0x02 0x00 0x00>; | |
| }; | |
| dce@312000 { | |
| compatible = "fsl,dce"; | |
| reg = <0x312000 0x10000>; | |
| interrupts = <0x10 0x02 0x01 0x04>; | |
| }; | |
| pme@316000 { | |
| compatible = "fsl,pme"; | |
| reg = <0x316000 0x10000>; | |
| interrupts = <0x10 0x02 0x01 0x05>; | |
| }; | |
| qman@318000 { | |
| compatible = "fsl,qman"; | |
| reg = <0x318000 0x2000>; | |
| interrupts = <0x10 0x02 0x01 0x03>; | |
| }; | |
| bman@31a000 { | |
| compatible = "fsl,bman"; | |
| reg = <0x31a000 0x1000>; | |
| interrupts = <0x10 0x02 0x01 0x02>; | |
| }; | |
| l2-cache-controller@c20000 { | |
| compatible = "fsl,t2080-l2-cache-controller"; | |
| reg = <0xc20000 0x40000>; | |
| next-level-cache = <0x23>; | |
| linux,phandle = <0x03>; | |
| phandle = <0x03>; | |
| }; | |
| sata@220000 { | |
| compatible = "fsl,pq-sata-v2"; | |
| reg = <0x220000 0x1000>; | |
| interrupts = <0x44 0x02 0x00 0x00>; | |
| }; | |
| sata@221000 { | |
| compatible = "fsl,pq-sata-v2"; | |
| reg = <0x221000 0x1000>; | |
| interrupts = <0x45 0x02 0x00 0x00>; | |
| }; | |
| }; | |
| pcie@ffe240000 { | |
| reg = <0x0f 0xfe240000 0x00 0x10000>; | |
| ranges = <0x2000000 0x00 0xe0000000 0x0c 0x00 0x00 0x20000000 0x1000000 0x00 0x00 0x0f 0xf8000000 0x00 0x10000>; | |
| compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; | |
| device_type = "pci"; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| bus-range = <0x00 0xff>; | |
| interrupts = <0x14 0x02 0x00 0x00>; | |
| pcie@0 { | |
| ranges = <0x2000000 0x00 0xe0000000 0x2000000 0x00 0xe0000000 0x00 0x20000000 0x1000000 0x00 0x00 0x1000000 0x00 0x00 0x00 0x10000>; | |
| reg = <0x00 0x00 0x00 0x00 0x00>; | |
| #interrupt-cells = <0x01>; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| device_type = "pci"; | |
| interrupts = <0x14 0x02 0x00 0x00>; | |
| interrupt-map-mask = <0xf800 0x00 0x00 0x07>; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x28 0x01 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x01 0x01 0x00 0x00 0x00 0x00 0x00 0x03 0x01 0x02 0x01 0x00 0x00 0x00 0x00 0x00 0x04 0x01 0x03 0x01 0x00 0x00>; | |
| }; | |
| }; | |
| pcie@ffe250000 { | |
| reg = <0x0f 0xfe250000 0x00 0x10000>; | |
| ranges = <0x2000000 0x00 0xe0000000 0x0c 0x20000000 0x00 0x10000000 0x1000000 0x00 0x00 0x0f 0xf8010000 0x00 0x10000>; | |
| compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; | |
| device_type = "pci"; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| bus-range = <0x00 0xff>; | |
| interrupts = <0x15 0x02 0x00 0x00>; | |
| pcie@0 { | |
| ranges = <0x2000000 0x00 0xe0000000 0x2000000 0x00 0xe0000000 0x00 0x20000000 0x1000000 0x00 0x00 0x1000000 0x00 0x00 0x00 0x10000>; | |
| reg = <0x00 0x00 0x00 0x00 0x00>; | |
| #interrupt-cells = <0x01>; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| device_type = "pci"; | |
| interrupts = <0x15 0x02 0x00 0x00>; | |
| interrupt-map-mask = <0xf800 0x00 0x00 0x07>; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x29 0x01 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x05 0x01 0x00 0x00 0x00 0x00 0x00 0x03 0x01 0x06 0x01 0x00 0x00 0x00 0x00 0x00 0x04 0x01 0x07 0x01 0x00 0x00>; | |
| }; | |
| }; | |
| pcie@ffe260000 { | |
| reg = <0x0f 0xfe260000 0x00 0x1000>; | |
| ranges = <0x2000000 0x00 0xe0000000 0x0c 0x30000000 0x00 0x10000000 0x1000000 0x00 0x00 0x0f 0xf8020000 0x00 0x10000>; | |
| compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; | |
| device_type = "pci"; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| bus-range = <0x00 0xff>; | |
| interrupts = <0x16 0x02 0x00 0x00>; | |
| pcie@0 { | |
| ranges = <0x2000000 0x00 0xe0000000 0x2000000 0x00 0xe0000000 0x00 0x20000000 0x1000000 0x00 0x00 0x1000000 0x00 0x00 0x00 0x10000>; | |
| reg = <0x00 0x00 0x00 0x00 0x00>; | |
| #interrupt-cells = <0x01>; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| device_type = "pci"; | |
| interrupts = <0x16 0x02 0x00 0x00>; | |
| interrupt-map-mask = <0xf800 0x00 0x00 0x07>; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x2a 0x01 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x09 0x01 0x00 0x00 0x00 0x00 0x00 0x03 0x01 0x0a 0x01 0x00 0x00 0x00 0x00 0x00 0x04 0x01 0x0b 0x01 0x00 0x00>; | |
| }; | |
| }; | |
| pcie@ffe270000 { | |
| reg = <0x0f 0xfe270000 0x00 0x10000>; | |
| ranges = <0x2000000 0x00 0xd8000000 0x00 0xd8000000 0x00 0x8000000 0x1000000 0x00 0x00 0x0f 0xf8030000 0x00 0x10000>; | |
| compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; | |
| device_type = "pci"; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| bus-range = <0x00 0xff>; | |
| interrupts = <0x17 0x02 0x00 0x00>; | |
| pcie@0 { | |
| ranges = <0x2000000 0x00 0xe0000000 0x2000000 0x00 0xe0000000 0x00 0x20000000 0x1000000 0x00 0x00 0x1000000 0x00 0x00 0x00 0x10000>; | |
| reg = <0x00 0x00 0x00 0x00 0x00>; | |
| #interrupt-cells = <0x01>; | |
| #size-cells = <0x02>; | |
| #address-cells = <0x03>; | |
| device_type = "pci"; | |
| interrupts = <0x17 0x02 0x00 0x00>; | |
| interrupt-map-mask = <0xf800 0x00 0x00 0x07>; | |
| interrupt-map = <0x00 0x00 0x00 0x01 0x01 0x2b 0x01 0x00 0x00 0x00 0x00 0x00 0x02 0x01 0x00 0x01 0x00 0x00 0x00 0x00 0x00 0x03 0x01 0x04 0x01 0x00 0x00 0x00 0x00 0x00 0x04 0x01 0x08 0x01 0x00 0x00>; | |
| }; | |
| }; | |
| fsl,dpaa { | |
| compatible = "fsl,t2080-dpaa", "fsl,dpaa"; | |
| ethernet@0 { | |
| compatible = "fsl,dpa-ethernet"; | |
| fsl,fman-mac = <0x24>; | |
| }; | |
| }; | |
| rapidio@ffe0c0000 { | |
| reg = <0x0f 0xfe0c0000 0x00 0x11000>; | |
| compatible = "fsl,srio"; | |
| interrupts = <0x10 0x02 0x01 0x0b>; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| ranges; | |
| port1 { | |
| ranges = <0x00 0x00 0x0c 0x20000000 0x00 0x10000000>; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| cell-index = <0x01>; | |
| }; | |
| port2 { | |
| ranges = <0x00 0x00 0x0c 0x30000000 0x00 0x10000000>; | |
| #address-cells = <0x02>; | |
| #size-cells = <0x02>; | |
| cell-index = <0x02>; | |
| }; | |
| }; | |
| }; |
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