-
-
Save geerlingguy/9d78ea34cab8e18d71ee5954417429df to your computer and use it in GitHub Desktop.
| #!/bin/bash | |
| # The default BAR address space available on the CM4 may be too small to allow | |
| # some devices to initialize correctly. To avoid 'failed to assign memory' | |
| # errors on boot, you can increase the range of the PCIe bus in the Raspberry | |
| # Pi's Device Tree (a .dtb file specific to each Pi model). | |
| # | |
| # You should probably read up on Device Trees if you don't know what they are: | |
| # https://www.raspberrypi.org/documentation/configuration/device-tree.md | |
| # | |
| # NOTE: The default BAR allocation was increased to 1 GB in this commit: | |
| # https://github.com/raspberrypi/linux/commit/54db4b2fa4d17251c2f6e639f849b27c3b553939 | |
| # Download the trial firmware from this post: | |
| # https://www.raspberrypi.org/forums/viewtopic.php?p=1761834#p1761834 | |
| # and replace the corresponding files in the boot volume. | |
| # Back up current Device Tree for the CM4. | |
| sudo cp /boot/bcm2711-rpi-cm4.dtb /boot/bcm2711-rpi-cm4.dtb.bak | |
| # Decompile the current Device Tree to a dts (source) file. | |
| dtc -I dtb -O dts /boot/bcm2711-rpi-cm4.dtb -o ~/test.dts | |
| # Edit the file and change the PCIe bus range as mentioned in: | |
| # https://www.raspberrypi.org/forums/viewtopic.php?p=1746665#p1746665 | |
| nano ~/test.dts | |
| # Replace the line that allocates 1 GB of RAM in the pci section: | |
| # ranges = <0x02000000 0x0 0xc0000000 0x6 0x00000000 0x0 0x40000000>; | |
| # | |
| # with the following line, which provides up to 8 GB of RAM: | |
| # ranges = <0x02000000 0x0 0x00000000 0x6 0x00000000 0x2 0x00000000>; | |
| # Also replace the scb ranges to: | |
| # ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>, | |
| # <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>, | |
| # <0x6 0x00000000 0x6 0x00000000 0x2 0x00000000>, | |
| # <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>; | |
| # Recompile the Device Tree from the dts (source) file. | |
| dtc -I dts -O dtb ~/test.dts -o ~/test.dtb | |
| # Copy the new Device Tree into place. | |
| sudo mv ~/test.dtb /boot/bcm2711-rpi-cm4.dtb | |
| # Reboot. | |
| sudo reboot |
followed the same process for bcm2711-rpi-4-b.dtb it booted

Please suggest the way forward to test it on the Raspberry pi 4b
dmesg | grep -i brcm-pcie
[ 0.500225] brcm-pcie fd500000.pcie: host bridge /scb/pcie@7d500000 ranges:
[ 0.500249] brcm-pcie fd500000.pcie: No bus range found for /scb/pcie@7d500000, using [bus 00-ff]
[ 0.500267] brcm-pcie fd500000.pcie: MEM 0x0600000000..0x07ffffffff -> 0x00c0000000
[ 0.500283] brcm-pcie fd500000.pcie: IB MEM 0x0000000000..0x00bfffffff -> 0x0400000000
[ 0.500295] brcm-pcie fd500000.pcie: Memory resource size exceeds max for 32 bits
[ 0.501377] brcm-pcie fd500000.pcie: PCI host bridge to bus 0000:00
[ 0.607152] brcm-pcie fd500000.pcie: clkreq-mode set to default
[ 0.609219] brcm-pcie fd500000.pcie: link up, 5.0 GT/s PCIe x1 (SSC)
The line:
MEM 0x0600000000..0x07ffffffff -> 0x00c0000000
indicates that the PCIe Root Complex has successfully mapped an 8 GB window (from 0x600000000 to 0x7ffffffff).
The "0x00c0000000" part: This is the internal translation address. It tells the SoC that any data sent to the 8 GB range in CPU memory should be translated to the PCIe bus starting at the 0xc0000000 offset.
This may be useful on the Pi 5 as well (to your question @5erv3), since some larger graphics cards are setting down to 256 MB of BAR space as they have 12+ GB of VRAM: geerlingguy/raspberry-pi-pcie-devices#680